We've created a new CMOS image sensor that has the cost and manufacturing advantages of industry-standard, CMOS processing technology while delivering performance that approaches that of a CCD image sensor.  In essence, our aim was to have the best of both worlds.  We've dramatically improved image quality by reducing crosstalk and dark current.  We've achieved this by creating pixels with inverted polarity that allow us to leave the substrate unchanged

It is an image sensor built using Complementary Metal Oxide Semiconductor (CMOS) technology.  Two of our primary goals were to reduce something called crosstalk and dark current.  In the context of an image sensor, crosstalk is basically just electrical charge that ends up in the wrong pixel. There are two primary components - electrical and optical.  We wanted to reduce the electrical component because that is the dominant one for conventional CMOS sensors.  When photons hit the pixel, they generate electron-hole pairs. Conventional CMOS sensors collect the electrons as signal charge carriers. If the charge ends up being collected inside the pixel that it was generated in, that's good. If it ends up in a neighboring pixel, it's crosstalk.  The smaller the pixels get, the more likely the charge carriers will end up in the "wrong" place — in neighboring pixels.  This problem gets bigger as pixels get smaller.

Actually, crosstalk causes noise during the color correction part of the image processing chain.  This happens because raw colors need to be sent through a color correction matrix to render true colors. When there is a lot of crosstalk, there is an increase in the off-diagonal terms in the correction matrix, which results in increased noise.

MTF (Modulation Transfer Function) is basically contrast versus spatial frequency. Imagine photons hitting the pixel; they create carriers, and instead of being collected right on the spot, some will spread out. So, you get point-spread or an increase in spot size.  When this happens, contrast and MTF decrease.

It is the current that's generated in the dark as the name implies.  When photons hit the sensor, they generate electron-hole pairs, resulting in a photocurrent.  But even when no photons are hitting the sensor, there is still current within the silicon that comes from thermal generation.  This dark current produces a false signal, which is another source of noise.

Something like that. It's the signal you're getting when there really shouldn't be any, and there is noise associated with it.

Indirectly, yes.  Think of it this way.  Consider a constant amount of light (the number of photons per unit area) hitting the image area of the sensor. If we add more pixels within that same image area, the individual pixel's area becomes smaller.  Therefore, each pixel will collect fewer photons and the resulting signal will be weaker. To maintain a given signal-to-noise ratio with a weaker signal, we would need to reduce noise. That way the image would still look good and we would get the advantage of higher resolution with more pixels.  And since the MTF is improved by reducing the crosstalk, it is easier to maintain the "native resolution" of the sensor.  So the new design lets us shrink the pixels while helping to maintain the same image quality.  It's worth pointing out that this sensor design is complementary to our new color filter array, which goes after the other part of the equation, namely increased signal.

We were working with a very demanding customer. They wanted the cost and speed advantages of CMOS with the photographic performance of CCD sensors. The problem is that the image quality isn't very good from conventional CMOS sensors (which were being built on p-type substrates at the time). There is a lot of crosstalk with conventional CMOS sensors and the dark current tends to be high. We could not meet their requirements with the technology that was on the market at the time.

Conventional CMOS imager built on a p-type substrate, showing crosstalk

Why did they want to focus on CMOS?

Compared to CCD technology, CMOS sensors have better cost, power, and frame rate characteristics.  Most of the semiconductor components in electronic devices use CMOS technology. The high volumes drive down cost. The idea was to leverage this technology, so that we could build a less expensive image sensor. The barrier was quality.  (Note: for more background, read the post Image Sensors 101:  CMOS vs CCD)

This customer was asking you to find a way to use less expensive technology but still provide image quality that was close to CCD quality.

Yes, they knew Kodak's reputation as a very high-end sensor designer and manufacturer. Their quality and device specifications were similar to those for a CCD. It was a high-end photographic application.

What are the "holes" that these sensors use?

Semiconductors have two types of charge carriers: electrons and holes. A hole is essentially the absence of an electron. A common analogy is to think of bubbles in a glass of water. In this case, the bubbles are the holes. It's easier to track the bubbles than the fluid moving around them. So we keep track of where the bubbles (or holes) go.  Most CCD and CMOS image sensors are designed to collect electrons not holes. Our new device is designed to collect the holes, which we found to have several advantages.

What were the biggest challenges you had to overcome?

Convincing people to do something no one else was doing. Everyone knows about companies making the move to n-type substrates to solve the problems of crosstalk and dark current.  When you tell them you want to flip everything upside down, there is always a lot of apprehension. A typical approach was to do what the CCD folks did, namely to use n-type substrates. They probably said, "We know how to solve these problems on CCDs, so let's build a CMOS sensor the same way by using an n-type substrate."  That's been done; there are a few examples of that out there.  N-type substrates are not used in mainstream CMOS processing though. A lot of the support circuitry has already been developed for normal CMOS processes using p-type substrates. This includes a lot of building blocks such as drivers, analog-to-digital converters, amplifiers, and so on. These things already exist. But they can't just be dropped into an n-type substrate and be expected to work. ¹

New CMOS imager with hole-based detectors built in a n-well with
conventional p-type substrate, showing reduced crosstalk

Many of the investments that the industry has made in CMOS circuitry would be lost if you started making sensors this way.

It would be like starting over.  The circuit designers start thinking, "We've got to redesign everything. We have to re-characterize everything." The foundries will say, "We've got to change our process. We have to come up with new device models. We've got to qualify the new starting material, and so on." Everyone gets concerned about all the changes required and work involved as soon as you say that you want to switch to n-type substrates.  It would take a lot of time and development costs would be high.

CCDs are made in dedicated fabrication facilities, whereas CMOS devices are made in industry-standard facilities.

CCDs have had many decades of development. It's a very specialized process, and it's fine-tuned for imaging. The CCD sensor is basically a single device. It has gate electrodes for the shift registers that are clocked externally, and there's an output amplifier. This little output amplifier is pretty much the only circuitry you find on a CCD. With CMOS, you can integrate a lot more circuitry and signal processing on the chip.

How does a CCD operate?

If you look at the cross section of a typical interline CCD, it has a p-well in an n-type substrate.  The CCDs and photodiodes are built in the p-well. The signal charge that is accumulated in the photodiodes gets dumped to the parallel CCDs. The charge in these CCDs is transferred to the serial register (or registers). From there the charge gets converted into a voltage at the output structure(s).  The voltage signal is then processed off the chip.

Typical interline CCD imager, showing reduced crosstalk

How does a p-substrate CMOS sensor differ from a CCD?

On a conventional CMOS sensor with a p-substrate, the image area is built directly in the silicon substrate. There is no well under the image area to help reduce crosstalk or dark current.  Photodiodes are used to collect the signal charge, which is dumped directly to the output structure after the accumulation period.  Here the signal charge is converted into a voltage within the pixels themselves. Unlike the CCD, there is only the one transfer — from the photodiode to the floating diffusion (the output structure within the pixel).  The chip also has a lot of peripheral circuitry to drive the imager and process the signals. There are row drivers and column circuits, to mention a few. There is a lot of other circuitry you can put on this chip. If you say, "I want to switch to n-type," a lot of this circuitry might not work.

What is the advantage of the new design? 

Circuit designers are happy when they can use what they already have. They like to build out from there, but not to have to redesign everything. So, they want to keep using the p-type substrate process. The foundries prefer this too.  We wanted a well structure to reduce crosstalk and dark current to improve the performance.  So we said "Ah, what about holes?" CMOS sensors don't require the high carrier mobility that CCDs do.  They don't have many thousands of transfers the way CCDs do.  We decided to use an n-well (instead of a p-well) in the same p-type semiconductor substrate so the rest of the circuitry remains unchanged. All we did is flip the conductivity type of the dopants in pixels within the image area.

It's like you're creating another component, that's an n-well inside the conventional p-substrate.

Right, and so instead of being n-type, the photodiodes are now p-type. The polarity of the signal carriers is inverted. When the electron-hole pairs are generated from the absorbed photons, the electrons are lost to the n-well, (where they are majority carriers), and the holes get collected in the photodiodes.

N-type substrate CMOS imager, showing reduced crosstalk

How would that be different if you made a full n-substrate device?

The n-substrate device would look similar except the image area would be built in a p-well. In the image above, look at the circuitry. All the n-type tubs get tied together. So all the VDDs get shorted together. And sometimes we want them at different voltages, but now they can't be. That's a simple example. And if we change the process, the transistors might change, their characteristics can change, and then the circuit designers have to redesign everything. It's probably a long, expensive journey if you go this way. Sure, you can get a good imager, but at what cost? The first sensors to use this approach seem to have a very low level of integration.

So the people working on the n-substrate approach are going to have an uphill battle getting the foundries to retool.

It can be done, but we think it will take a lot of time and money. That tends to defeat the whole idea behind a CMOS image sensor. The point was to leverage existing CMOS technology and drop in the image sensing area. With our approach, we had working devices in only about 6 months.  That included the complete cycle from modeling and design through fabrication and testing.

This new design applies to all pixel sizes, but it is especially advantageous for the really small pixels.

The problem of crosstalk does get worse as pixel sizes shrink, yes. But even for the full-size 35 mm image sensors, it still helps. Those sensors have tens of millions of pixels, and each pixel is still 5 or 6 microns, or so. Compared to a 1.4 micron device, that's a big pixel. But compared to the carrier's diffusion length, it's still pretty small. The diffusion length of the minority carriers, (which relates to the distance they can travel before they recombine), is on the order of 100 microns. So they can diffuse a long way. And when you're talking about a 5- or 6-micron pixel, that is still significant.

So this new design would bring a significant boost to the quality for large sensors?

Yes, but there are many advantages other than reduced crosstalk. As we mentioned earlier, the dark current is lower.  This is very important for digital still cameras and applications. The well structure itself reduces dark current. Generation from the bulk can't get into the photodiodes because a potential barrier is created at the n-well/p-substrate junction. But there are other advantages to using a pMOS pixel. For example, the pMOS pixel uses n-type dopants for the pinning and isolation regions. Those dopants, (e.g., arsenic or phosphorous), tend to pile up at silicon/silicon-dioxide interfaces. In an nMOS sensor, boron is used for those regions, which tends to segregate out of the silicon. So it is easier to "passivate" these interfaces for the pMOS pixel. This also helps reduce dark-current generation.  pMOS transistors also have lower 1/f noise than nMOS FETs. So the pixel's amplifiers have lower noise.

Could handset manufacturers start using compact sensors that would have a performance on par with that of a standalone consumer digital camera?

This new design is a step in that direction. It will help reduce the noise in small sensors and open new application spaces.  For handset makers, having sensors with smaller pixels that perform as well as larger devices is the main attraction.  They want to be able to increase the resolution while maintaining the image quality of the sensors they currently use.

First Silicon.  Here is a picture of the first test wafer...
it worked, of course:>)

Reference
E. Stevens, H. Komori, H. Doan, H. Fujita, J. Kyan, C. Parks, G. Shi, C. Tivarus, J. Wu,
"Low-Crosstalk and Low Dark Current CMOS Image Sensor Technology
Using a Hole-Based Detector," IEEE ISSCC Dig. Tech. Papers, vol. 51, p. 60, Feb. 2008.

¹ N-substrate sensors have been marketed, with a considerable performance improvement. The cost advantage has largely been offset by the need to push most of the support circuitry onto a conventional CMOS component.

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